Chip-scale atomic clocks can supplement GNSS receivers to provide accurate and reliable time in GNSS-challenged environments. Photo: Microchip Technology
Accurate and reliable time is just as important as accurate and reliable location for a wide range of military and civilian applications — and GNSS receivers cannot provide either one when they are jammed. For timing, one solution is to supplement GNSS receivers with a miniature atomic clock. We asked Microchip Technology a few questions about their chip-scale atomic clock (CSAC) and Stewart Hampton, the company’s senior product line manager, responded.
How long was your SA65 CSAC in development before you announced it in August 2021? Typically, how often do you launch a new CSAC?
CSAC development started in 2001 under a contract from DARPA with Draper and Sandia laboratories. CSAC was first introduced to the commercial marketplace in 2011, and in 2016 we released an improved product design with an operating temperature range of –10 C° to +70 C°. Last year we released our CSAC SA65 with a wider operating temperature range, faster warm-up and improved frequency stability aimed at the defense and industrial marketplace. So, it has been about five years between major CSAC releases, but that may not be indicative of future products because we have also introduced specialized CSAC versions, such as the Low Noise CSAC (LNCSAC) in 2014 and the only commercially available radiation-tolerant CSAC (Space CSAC) in 2018.
What is the CSAC SA65’s drift rate?
Its typical drift rate is specified at <9 × 10–10 per month. Another key specification, particularly for many portable military applications, is total sensitivity of frequency to temperature (tempco) over a specified range. For the CSAC SA65, that specification is ±3 × 10–10 over the entire operating temperature range of –40 C° to +80 C °.
What are a few specific military use cases?
CSAC is designed into multiple military programs and used in a wide variety of military applications, particularly in GNSS-denied environments — including assured positioning, navigation and timing (APNT) modules, underwater unmanned and autonomous vehicles, software-defined radios, man-portable transceiver-based military communications, vehicle management computers, airborne reconnaissance/UAVs and GNSS-disciplined oscillators. It is also used in command, control, communications, computers, cyber, intelligence, surveillance and reconnaissance (C5ISR). The space CSAC variant is commonly used on low-Earth-orbit space defense payloads supporting such applications as low-latency communications networks, RF geolocation (geointelligence, or GEOINT), optical time transfer, alternative PNT satellites and Earth observation.
New SA65 CSAC provides wider operating temperatures, faster warm-up and improved frequency stability in extreme environments
Photo: Microchip Technology
Microchip Technology Inc. is offering the new SA65 chip-scale atomic clock (CSAC), providing precise timing accuracy and stability in extreme environments. Designed for military and industrial systems, the Microchip’s SA65 CSAC features ultra-high precision and low power consumption
Advanced military platforms, ocean-bottom survey systems and remote-sensing applications all require precise timing. CSACs ensure stable and accurate timing even when GNSS time signals are unavailable, thereby helping industrial and military system designers to meet timing requirements.
Microchip’s SA65 CSAC is an embedded timing solution with improved environmental ruggedness, delivering higher performance than the previous SA.45s CSAC, including double the frequency stability over a wider temperature range and faster warm-up from cold temperatures. The SA65 has an operating temperature range of –40 to 80 °C and a storage temperature range of –55 to 105 °C. The warm-up time of two minutes at –40 °C is 33% faster than that of the SA.45s.
These performance improvements benefit designers of highly portable solutions for military applications such as assured positioning, navigation and timing (A-PNT) and C5ISR (command, control, communications, computers, cyber, intelligence, surveillance and reconnaissance). It meets precise frequency requirements of a low size, weight and power (SWaP) atomic clock. Improvements such as fast warm-up to frequency after cold start, temperature stability over a wide operating range, and frequency accuracy and stability enabling extended operation while GNSS is denied help to ensure mission success in conflict environments.
The SA65 CSAC provides precise timing for portable and battery-powered applications requiring continuous operation and holdover in GNSS-denied environments. The SA65 is form-, fit- and function-compatible with the SA.45s, which minimizes risk and redesign costs for the system developer while improving performance and environmental insensitivity.
A new miniature atomic clock offers improvements to temperature sensitivity and long-term drift, which correlate to longer holdover durations. Features important to mobile applications —warm-up characteristics, gravity sensitivity, and shock and vibration — as well as new 1 pulse-per-second (PPP) input and output signals are highlighted.
By William Krzewick, Jamie Mitchell, John Bollettiero, Peter Cash, Kevin Wellwood, Igor Kosvin and Larry Zanca
The miniature atomic clock (MAC) was developed out of the same size and power-reducing technology, known as coherent population trapping (CPT), as the venerable chip-scale atomic clock (CSAC). By implementing low-power lasers as opposed to traditional lamp designs, this technology allows for unparalleled performance versus power consumption in the commercial oscillator domain.
Since its initial release in 2009, the MAC has been well-suited for telecom applications as a holdover reference oscillator in GNSS-denied environments. Now, with advances in field-programmable gate array (FPGA) design, signal processing and electronics miniaturization, and by leveraging more than 40 years of atomic clock design at Microchip Technology, the next generation MAC is designed to meet a variety of applications with demanding mission scenarios.
In this article, we discuss improvements to temperature sensitivity and long-term drift, which correlate to longer holdover durations. We also discuss warm-up characteristics, gravity (g)-sensitivity, and shock and vibration, which are important for mobile applications. Finally, several new features will be introduced including a 1 pulse-per-second (1PPP) input and output signal.
INTRODUCTION
Low-drift performance over time and frequency stability during temperature changes have enabled small atomic oscillators to maintain precise time and frequency in the absence of a primary reference such as GNSS. The MAC-SA5X rubidium (Rb) miniature atomic clock has advanced the design of the legacy MAC-SA.3Xm with a wider operating temperature range, additional features and improvement in frequency drift and temperature stability to enable longer holdover durations. Measuring 2 × 2 × 0.72 inches (5.08 × 5.08 × 1.83 centimeters), it is designed for size and power-constrained applications that require atomic clock performance.
FIGURE 1 shows exterior and interior views of the MAC, while FIGURE 2 is a block diagram of the clock. The vertical-cavity surface-emitting laser (VCSEL) with thermoelectric cooler (TEC) generates the light source at the appropriate wavelength. The laser light is directed into the resonance cell to stimulate the Rb atoms. Use of a VCSEL, as opposed to the traditional lamp design, results in a relatively low-power, small-form-factor package while eliminating frequency jumps and preserving short-term stability. The new TEC enables fast temperature response, increased temperature set-point resolution, and a larger temperature range.
FIGURE 1 Top view (left), inside view (center) and bottom view (right) of MAC. (Photo: Microchip)FIGURE 2. Block Diagram of MAC. (Diagram: Microchip)
The temperature-compensated crystal oscillator (TCXO) drives an FPGA-based direct digital synthesizer (DDS) for higher accuracy with minimal board space intrusion, differential signaling and additional power isolation. Linear microwave control, which has direct impact on frequency stability as measured by the Allan deviation (ADEV), lock times and temperature compensation, is a key improvement.
The resonance cell subassembly contains the Rb gas mixture. It is surrounded by an oven with C-field (static magnetic field) coil necessary for controlling the temperature and magnetic field, respectively, of the Rb atoms. Dual magnetic shields mitigate the effects of external magnetic fields. The photodiode printed-circuit-board assembly detects CPT resonance of the clock. The resonator is fundamentally unchanged and therefore not expected to impact the quality factor, Q, of the oscillator.
The signal-to-noise ratio (SNR) of the CPT signal, on the other hand, has improved thanks to the updated control electronics design, faster servo-loop algorithms and use of lower noise electronics. This is evident in the less noisy clock transition for the MAC-SA5X (orange trace in FIGURE 3) versus the predecessor (black trace). Because the 1-second ADEV is proportional to 1/(Q×SNR), the short-term stability is improved in the new design.
FIGURE 3. CPT resonance of MAC. (Image: Microchip)
PERFORMANCE
This next generation of the rubidium atomic clock leverages substantial improvements in both hardware and software. These improvements, coupled with more than a decade of experience in practical CPT technology, have allowed for significant insight into physics behavior and interrogation techniques. This has resulted in improvements to key performance parameters such as temperature range, stability, retrace and lock times. These metrics will be reviewed in the following sections by comparing data from a sample of pre-production engineering units.
ADEV. Short-term frequency stability of the oscillators is represented in FIGURE 4 as an ADEV measurement. The MAC-SA5X has two performance classifications: The SA53 is the base-performance (red dots) and the SA55 is the high-performance (red squares). The MAC-SA55 has a 1-second integration period, tau (τ) = 1 second, ADEV requirement of less than 3 × 10-11, that follows a 1/√τ behavior to τ = 1000 seconds. ADEV rises at 105 seconds to accommodate the mid-/long-term frequency drift of the oscillator, with a generous margin. The base-performance version MAC-SA53 has a looser ADEV specification of less than 5 × 10-11 at 1 second that follows a 1/√τ behavior to 100 seconds.
On average (dashed line), the sample units had a 1-second ADEV of about 1.2 × 10-11. A narrow grey line represents the average values of the data set plus two standard deviations, and the orange line represents a sample unit that closely mirrored the average performance (limited sample size of five for long-term testing).
Two notes on Figure 4 are worth mentioning: The standard deviation line has a larger spread from average as the observation interval increases and a small (~2 × 10-13) bump exists in the measurement at 400 seconds. The former is due to increased measurement noise as there are simply fewer data points for longer τ. The latter is believed to be a result of the heating, ventilation and air conditioning (HVAC) system in the laboratory as it cycled. All MACs are compensated to reduce temperature effects, as will be discussed later. However, these units were not compensated at the time of testing and were more susceptible to HVAC temperature effects compared to full-production units.
FIGURE 4. Frequency Stability vs. Observation Interval (τ) of MAC Sample Units. (Image: Microchip)
Aging. Long-term frequency drift (monthly aging rate) of the MAC has a requirement of 1 × 10-10 per month and 5 × 10-11 per month for the SA53 and SA55 variants, respectively. It is important to note that the majority of sample units fall well within the tighter 5 × 10-11 per month requirement and accordingly affect the average mid-/long-term stability in the ADEV plot. Future production units that only meet the baseline SA53 performance could have inferior stability beyond τ = 100 seconds, compared to our sample data.
TDEV. The time stability of the phase is represented in FIGURE 5 as a time deviation (TDEV) measurement. This type of test is important to compare oscillators, since it gives an estimation of time error accumulation due to only the free-running oscillator itself by removing time or frequency errors at the beginning of the test. The graph uses the same color scheme as the ADEV plot to indicate average data (dashed line), average plus two standard deviation data (thin line) and a sample unit as an orange trace.
FIGURE 5. Phase Stability vs. Observation Interval (τ) of MAC Sample Units. (Image: Microchip)
Based on the required stability performance of the SA55, the time error after three days for a free-running oscillator is predicted to be less than 650 nanoseconds. For the measured units, the MACs had a TDEV of about 230 nanoseconds at τ = three days, due to the long-term drift performance of our samples.
Phase Noise. Phase noise for the MAC has two classifications: base performance and high performance over the range 1 Hz to 10 kHz.
Average phase noise data is well below the requirements, for our samples.
Temperature Effects. As a small Rb oscillator, the MAC inherently has low sensitivity to environmental temperature perturbations compared to most commercial quartz oscillators. To further improve performance, each MAC is characterized and compensated with a high-order polynomial fit of temperature effects to reduce peak-to-peak frequency changes below 5 × 10-11 over a wide operating range. The SA53 has a two times relaxation for this requirement.
Retrace. Retrace specifications are provided to indicate the expected frequency change of an oscillator due to that oscillator being powered off and back on again. The MAC retrace test is defined as follows:
The MAC is powered on, and its frequency offset (from nominal) is measured after 24 hours.
Power is removed for 48 hours.
Power is turned back on, and its frequency offset is measured again after 12 hours.
The delta frequency between the two measurements is calculated to be within ±5 × 10-11.
A test verified the specification of ±5 × 10-11 after 12 hours.
For this test, however, we did not wait 12 hours to measure the retrace frequency change. Instead, we began measuring immediately after power was turned back on. The measured data from sample SN00011 is indicative of typical performance and shows how the MAC retrace frequency delta is well within ±1 × 10-11. This unit had a slightly positive delta and meets the retrace requirement in minutes — far sooner than the modest 12-hour specification.
The sample units as a whole performed similarly to the sample SN00011.
Warm-up Time. Defined as the time to reach atomic lock, warm-up time is the point at which atomic resonance is attained and the short-term stability performance of the oscillator will be achieved. Test average and standard deviation data is well within the requirement of 8 minutes at temperatures greater than –10°C. At colder temperatures, the requirement is 12 minutes.
Typical performance is about four minutes to achieve lock at a starting temperature of 25°C. This has been a major design focus; all MACs are designed and tested to quickly achieve lock at all temperatures.
Power Consumption. Average power consumption in a 25°C environment is about 6 W. Warmer environments reduce the power consumption, due to less required heating of the resonance cell to achieve the appropriate temperature.
1PPS Disciplining. A 1-Hz (1PPS) input and output signal are new features for the MAC. The 1PPS output is derived directly from the TCXO, and its stability performance is therefore tied to the RF output performance. The 1PPS input accepts a reference signal from a primary reference clock to calibrate the MAC’s 1PPS (and RF) output. The algorithm will simultaneously steer the phase and frequency to that of the external reference (1PPS input), ultimately achieving accuracies of less than 1 nanosecond and 1 × 10-13, respectively. This feature is quite useful for applications where absolute frequency or phase errors need to be minimized and is similar to the function available on the CSAC.
The MAC can quickly calibrate its RF output by turning on the 1PPS disciplining feature to correct a 1.4 × 10-8 frequency error in minutes. A user can adjust the disciplining time constant to accommodate for noisier 1PPS input signals, if necessary.
g-Sensitivity Testing. Vibration and g-sensitivity testing was conducted. Static acceleration effects, such as a “tipover” test, on atomic clocks are minimal, and they exhibit a sensitivity of several parts per trillion per g. The MAC significantly outperformed a commercial oven-controlled crystal oscillator or OCXO. This type of performance is important for applications where the equipment is placed on its side, for instance.
Unlike static acceleration, effects due to random vibration profiles are determined mostly by the TCXO and will adversely affect the performance. Preliminary testing of the MAC has shown an effective sensitivity of several parts per billion per g. TABLE 1 describes the profile used to test the MAC from “MIL-STD-810, Fig. 514.7E-1, Category 24.” The profile was applied to all three axes tested.
Table 1. Random Vibration Profile Expressed as Power Spectral Density (PSD). (Data: Microchip; Graphic: GPS World)
The g-sensitivity may be calculated from the dynamic phase-noise measurement. The total effective g-sensitivity was determined by taking the magnitude due to the random vibration profile applied in all three axes.
The total effective g-sensitivity due to the random vibration profile is about 2.4 × 10-9 per g. Results of the worst-case sensitivity are summarized in TABLE 2.
Table 2. Summary of g-Sensitivity. (Data: Microchip; Graphic: GPS World)
Table 1. Random Vibration Profile Expressed as Power Spectral Density (PSD). (Data: Microchip; Graphic: GPS World)
SUMMARY
Based on the CPT method of interrogation, a commercial miniaturized rubidium atomic clock has been developed with a wider operating temperature of –40 to +75°C and improved performance over its predecessor MAC-SA.3Xm. New features, such as the 1PPS input, allow users to connect a GNSS-derived signal to calibrate the clock and then maintain timing during GNSS-outages for longer durations thanks to improvements in stability performance. Retrace measurements of ±1 × 10-11, temperature stability of less than 5 × 10-11 and fast/consistent warm-up times along with the small size and power afforded by CPT technology enable a variety of mobile applications.
ACKNOWLEDGEMENT
This article is based on the paper “A Next-Generation, Miniaturized Rb Atomic Clock Reference for Mobile, GNSS-Denied Environments” presented at ION ITM 2020, the International Technical Meeting of The Institute of Navigation, held in San Diego, California, Jan. 21–24, 2020.
At Microchip Technology, WILLIAM KRZEWICK is the product line manager, JAMIE MITCHELL is the manager of engineering, JOHN BOLLETTIERO is an associate engineer, PETER CASH is the associate director of clock products, KEVIN WELLWOOD is the manager of software engineering, IGOR KOSVIN is the principal engineer of electrical engineering and LARRY ZANCA is the principal engineer of mechanical engineering.
The device provides the accuracy and stability of atomic clock technology while achieving significant breakthroughs in reduced size, weight and power (SWaP) consumption, the company said.
As the newest member of Microsemi’s CSAC product family, the Commercial Space CSAC provides excellent drift performance and built-in 1 pulse per second (PPS) input for GPS disciplining, making the device well-suited for holdover applications.
It is targeted at several other commercial space and space research applications, including:
satellite timing and frequency control;
satellite cross linking;
assured position, navigation and timing; and
Earth observation.
With many spacecraft manufacturers turning to commercial off-the-shelf (COTS) parts to meet performance, schedule and cost requirements, the Commercial Space CSAC offers a solution for many satellite missions.
“With the introduction of the Commercial Space CSAC, we now offer a space-deployable atomic precision clock reference with radiation tolerance in support of the space market’s desire to reduce mission costs and design times using COTS devices,” said Peter Cash, director of the clock business unit at Microsemi. “As the first atomic reference clock with low SWaP available for space, our new device is well-suited to applications requiring precise clock synchronization, including a variety of existing and emerging LEO applications.”
According to a market intelligence report by Euroconsult titled, “Satellites to be Built & Launched by 2026 World Market Survey,” the total revenue for satellite manufacture and launch is expected to be $304 billion between 2017-2026. With revenues of $102 billion, LEO is expected to account for a third of the total market, with 82 percent derived from satellite manufacturing.
“Harris provides the world’s most advanced sensors, payloads and communications technologies; receiving and information processing systems; and analytics, which provide our customers with the integrated information and actionable intelligence they need for mission and business success,” said Tim Lynch, general manager, Mission Solutions at Harris Corporation’s Space and Intelligence Systems segment. “Microsemi’s latest atomic clock will support Harris in delivering complete mission solutions to our customers.”
As a stand-alone atomic clock with a 10-megahertz CMOS-compatible output, Microsemi’s Commercial Space CSAC is a timing module providing an impressive short-term stability (Allan Deviation) and frequency stability across the operating temperature (TempCo), the company added.
A standard CMOS-level RS-232 serial interface is built into the device, which is used to control and calibrate the unit and provide a comprehensive set of status monitors. The interface is also used to set and read the CSAC’s precise internal time-of-day clock.
Microsemi’s radiation-tolerant ruggedized oscillators also include OCXOs and EMXOs for applications that require higher accuracy and can support higher power consumption.
Other key features include:
Power consumption of less than 120 milliwatts (mW)
Less than 17 cubic centimeters volume (1.6 in. × 1.39 in. × 0.45 in.)
Radiation-tolerant: 20 krad
Single event latch-up (SEL) and single event upset (SEU) tested to 64 megaelectron-volts per square centimeter/milligram (Mev-cm2/mg)
Short-term stability (Allan Deviation) of 3.0 × 10–10 at TAU = 1 sec
Frequency stability across temperature range (TempCo) less than 5×10-10
1PPS output and 1PPS input for synchronization and time-keeping
Microsemi Corporation has announced its new thermally improved chip-scale atomic clock (CSAC) components with full operating and storage temperature. The new devices offer low-power holdover atomic clock technology without compromising size, weight and power (SWaP) while operating at a wide temperature range.
Microsemi is exhibiting this week at ION GNSS+, being held in Portland, Oregon.
With an operating temperature range of -10 to 70 degrees Celsius, Microsemi’s new CSAC components are highly reliable, with improved product design, process enhancements and robust product verification/validation, the company said.
The revolutionary technology enables new applications and missions not possible in the past with traditional OCXO and Rubidium clocks, offering the low SWaP clock technology at 17 cubic centimeters (cc) in size, 35 grams of weight and only 120 milliwatts of power. Microsemi’s CSAC product offers ±5.0E-11 accuracy at shipment and a typical ≤ 9.0E-10/month aging rate, which makes it suitable for many low-power atomic clock holdover applications.
“The enhancements to our CSAC product offering focus on providing the highest reliability without compromising performance for our customers, particularly in mission critical applications where every milliwatt matters,” said Ramki Ramakrishnan, director of product line management, at Microsemi. “These devices utilize an innovative approach to the component level atomic clock that will help Microsemi access the entire oscillator industry, along with miniature atomic clocks (MAC), and capitalize on the revenue growth potential within the defense, communications, industrial and test and measurement markets.”
According to the “Crystal Oscillator Market—Global Forecast & Analysts” report posted by Markets & Markets, the total available market (TAM) for the overall oscillator market is estimated to be $2.4 billion in 2016, with OCXO markets targeted by CSAC estimated to have a serviceable addressable market (SAM) of $260 million in 2016.
Microsemi’s thermally improved CSAC products support the company’s strategic presence in the defense and security markets, targeting applications such as low-power holdover against GPS vulnerabilities for position, navigation and timing security. They are also suitable for holdover in underwater (ocean bottom nodal) applications and atomic frequency reference in test and measurement applications.
“Leveraging the unique attributes of Microsemi’s CSAC technology, our company is able to offer an unprecedented combination of holdover, g-sensitivity, low power consumption and warm-up performance, while reducing the footprint to less than the critical 0.6 inches height — allowing retrofitting of legacy equipment,” explained Said Jackson, president of Jackson Labs Technologies, Inc. “The CSAC combined with our battle- and theater-proven software algorithms and support hardware enables vastly extended mission times while providing critical backup performance for GPS-denied environments when even the optional integrated Selective Availability Anti-spoofing Module (SAASM) GPS technology is jammed.”
Microsemi’s thermally remediated CSAC components are sampling now, with full production in October. For more information, visit the website or contact [email protected].
Sponsored by: Symmetricom Broadcast Date: Thursday, March 7, 2013 Speaker: Steve Fossi, Director of New Business Development, Symmetricom Panelist: Ravi Pragasam, Marketing Manager, Embedded Solutions, Symmetricom Summary: Atomic clocks have enabled a world where ultra-precise timekeeping is now mandatory for communications, navigation, signal processing and many other applications critical to a modern functioning society. Symmetricom has utilized leading-edge technology and multiple innovations in various disciplines such as semiconductor laser technology, silicon processing, vacuum-packaging and firmware algorithms to deliver the Quantum SA.45c CSAC (Chip Scale Atomic Clock). Attend this webinar and learn how the CSAC can address your requirements for a precise clock without consuming excessive power or taking up too much space in your application.
Robert Lutwak, Symmetricom, winner in the Product category.
New Advances in Receiver Performance and Reliability
Editor’s Note: This article reproduces the acceptance speeches given by the winners of GPS World’s 2012 Leadership Awards, at the Leadership Dinner in Nashville in September. The Leadership Dinner was sponsored by Lockheed Martin and Deimos Space.
Remarks by Robert Lutwak, Symmetricom; Chief Scientist, winner in the Products category. His expertise is practical advances to overcome the intrinsic physical barriers to affordable chip-scale atomic clocks, enabling precision time and time transfer in mobile GNSS and communications systems.
Thank you to the awards committee and especially to the individual who nominated me.
I would be remiss if anyone left here with the impression that the development of the chip-scale atomic clock was in any way a solo effort. On the contrary, while I have had the privilege of being the front man, the success of this program can be attributed entirely to the fantastic collaboration between three highly disparate groups, from very different industries and cultures: our Research Group at Symmetricom’s Technology Realization Center, in Beverly, Massachusetts; the MEMS group at the Charles Stark Draper Laboratory, led by Mark Mescher and Matt Varghese; and the optoelectronics group at Sandia National Laboratories, led by Darwin Serkland. If any of these groups and people had been anything less than extraordinary, both technically and personally,I would not be standing here this evening.
With this introduction I can say, with little loss of humility, that the chip-scale atomic clock (CSAC) is a really cool device. Depending on where you’re coming from, it’s either 100 times lower size, weight, and power (SWAP) than traditional atomic clocks or it’s 100 times more accurate than quartz oscillators with comparable SWAP. Regardless of your perspective, it clearly represents a disruptive technology and a paradigm shift for portable battery-powered navigation, communication, and timing applications. For comparison, the CSAC can run for a day on a full cellphone battery charge, whereas the next lowest power clock of comparable performance will run down a car battery in an hour. The CSAC is not an evolutionary improvement in SWAP, it is revolutionary in that it enables previously untenable system architectures, mission scenarios, and network topologies.
Since Symmetricom introduced the first commercial CSAC, roughly two years ago, the market response has been overwhelming. Despite having done our due diligence to predict the market demand and despite having nearly doubled our manufacturing output every quarter, our shipment backlog remains strong, and I am frequently surprised by innovative customer applications that we had not envisioned at the product launch. We have to date shipped many thousands of CSACs to more than a hundred different customers, representing vastly different markets and applications. While many of the novel applications are still in the early stages of prototype development and evaluation, it is clear that CSACs will be ubiquitous across diverse applications within the decade.
I am fortunate, in my position, to interact directly with the technical integrators of the CSAC and learn the details of many of the applications. My general impression is that the timing and frequency stability performance of the CSAC is adequate for most of the emerging applications. The most common requests that I hear from customers are for reduced cost, power consumption, and size, in that order. It is not surprising that size is at the bottom of the list. In most applications, the batteries are still larger and heavier than the CSAC, so small improvements in power consumption are generally more valuable to reducing system SWAP than size reduction of the CSAC itself.
As in any new technology, the cost will come down naturally with increased volume and improved manufacturing efficiencies, both at Symmetricom and at our vendors. While it is unlikely that you will get a CSAC in your next free cellphone, I do expect that the cost will progressively decrease over the next several years, and the technology will become cost-viable to an exponentially increasing spectrum of applications. Similarly, we continue to evolve our electronics and algorithms for improved power consumption, aided by external advancements in microwave and microprocessor electronics driven by the smart-phone industry. It is my expectation that a factor of 2X improvement in power consumption is likely within the next three to five years.
To date, most of the commercial products that have emerged, based on CSAC technology, have been in the timing and frequency calibration space. It is not surprising to me that the time and frequency community was the first to adopt and exploit the technology, as many of them have been closely monitoring the development program and had the internal expertise and experience to rapidly exploit it.
I admit, though, that I am a bit disappointed to see that there are no papers with “CSAC” in their titles at the 2012 ION-GNSS, but I am confident that this will change in the years to come. Adoption of CSAC by the navigation community has lagged behind the timing community in large part, I believe, because the technology has caught the community somewhat off-guard, and the benefits of the CSAC to INS and GNSS are just now beginning to be realized.
The most obvious and straight-forward application of CSAC to GNSS is rapid P(Y) acquisition; we have demonstrated 15-second time-to-subsequent-fix (TTSF) after two hours of GPS denial. This was a fairly simple demonstration that consisted of jamming time into an unmodified GPS receiver, but I believe that this is just the tip of the iceberg. With access to the core navigation algorithms within the receiver, precise knowledge of time could improve the receiver performance and reliability on other levels, including (at least):
◾ Improved uncertainty of the navigation solution
◾ Navigation with less than four (or less than three) satellites
◾ Anti-spoof and anti-jam detection
◾ Seamless co-integration of GNSS and INS systems
Another navigation area that I believe is ripe to benefit from CSAC technology is in self-assembling navigation systems, such as a local ad hoc GNSS-like network which self-assembles from handheld timing beacons/receivers. Such a system would have value for safety-of-life applications in GPS-denied environments, such as indoor firefighting and mine safety.
Thank you again for the recognition and opportunity of this award.
