The PureL5 Customer Evaluation System is being tested by California and Chinese companies
OneNav has announced the commercial availability of its pureL5 GNSS digital IP core.
The pureL5 digital IP core’s architecture enables it to directly acquire and track L5 signals from GPS, Galileo, BeiDou, QZSS and GLONASS without any L1 aiding. This eliminates the entire L1 RF chain, saves space on the printed circuit board, and simplifies the RF front-end and antenna subsystem in smartphones, wearables and trackers.
The pureL5 digital IP core’s massively parallel array processor searches the entire 1-millisecond L5 code space in parallel, delivering 1 second time to first fix (TTFF). The pureL5 digital IP core is 0.28mm2 in the 3-nm semiconductor process and consumes 4.7 mW of power in 1-Hz tracking mode.
OneNav has delivered the pureL5 digital IP core register-transfer level (RTL) to its first system-on-chip (SOC) customer. IP core RTL verification and physical implementation are complete, and oneNav’s SOC licensee will tape out in the first quarter of this year. The pureL5 digital IP core RTL is available for customer licensing and shipment now.
Customer Evaluation System. OneNav’s pureL5 Customer Evaluation System is being tested by companies in California and China. The system is available for smartphone and wearable OEMs and SOC providers who want to evaluate oneNav’s pureL5 in the field and the lab.
PureL5 GNSS Features
Smaller footprint than L1+L5 hybrids, simplifying implementation in highly space-constrained devices such as 5G smartphones and wearables
Lowers bills of material (BOM) cost and simplifies the RF front-end and antenna subsystem by eliminating the entire L1 RF chain
No L1 aiding required: directly acquires L5/E5/B2 with 1-second TTFF
Less software complexity, simplifies RF coexistence engineering
Better interference resiliency
Scalable IP signal processing core is semiconductor process-node independent
SkyTraq is offering a 12 x 16 millimeter multi-band real-time kinematic (RTK) receiver for centimeter-level accuracy positioning applications. The PX1122R works with all the four GNSS, using GPS L1/L2C, Galileo E1/E5b, GLONASS L1/L2 and Beidou B1I/B2I signals concurrently to maximize positioning availability even in difficult urban environments.
A single-chip system-on-chip, the PX1122R is designed to deliver reliable, centimeter-level accuracy positioning for autonomous unmanned ground or aerial vehicles, the internet of things, and traditional land surveying and precision farming applications.
The PX1122R has an RTK initialization time under 10 seconds and a maximum update rate of 10 Hz. Its update rate provides in-time positioning with a fast response time and improved guidance for fast-moving applications, the company said.
Moving-base RTK for GNSS precise heading is also supported. By using two PX1122R and two antennas with 1-meter separation, highly accurate 1-sigma heading accuracy of 0.13 degree can be obtained; such heading accuracy is immune to magnetic interference and unaffected by the receiver’s speed.
The PX1122R can serve as a key component to provide precise position and heading information for autonomous applications. PX1122R sample, data sheet and evaluation boards are available now.
Founded in 2005, SkyTraq Technology Inc. develops high-performance chipset and module solutions for the consumer market. Its initial product is L1-GPS-centric, and now its products cover L1, L2, L5, L6 band GPS/GLONASS /Beidou/Galileo/QZSS/NavIC/SBAS applications.
Qualcomm Technologies unveiled at CES 2020 its newest addition to the company’s portfolio of automotive products — the Qualcomm Snapdragon Ride Platform.
Snapdragon Ride is an advanced, scalable and open autonomous driving solution consisting of the family of Snapdragon Ride Safety system-on-chips (SoCs), Snapdragon Ride Safety Accelerator and Snapdragon Ride Autonomous Stack.
CES 2020, the massive annual consumer electronics show, is taking place Jan. 7-10 in Las Vegas.
Snapdragon Ride aims to address the complexity of autonomous driving and ADAS by leveraging its high-performance, power-efficient hardware, industry-leading artificial intelligence (AI) technologies and pioneering autonomous driving stack to deliver a comprehensive, cost and energy efficient systems solution.
The unique combination of Snapdragon Ride SoCs, accelerator and autonomous stack offers automakers a scalable solution designed to support three industry segments of autonomous systems, namely L1/L2 Active Safety ADAS for vehicles that include automatic emergency braking, traffic sign recognition and lane keeping assist functions; L2+ Convenience ADAS for vehicles featuring Automated Highway Driving, Self-Parking and Urban Driving in Stop-and-Go traffic; and L4/L5 Fully Autonomous Driving for autonomous urban driving, robo-taxis and robo-logistics.
The Snapdragon Ride Platform, based on the Snapdragon family of automotive SoCs and accelerator, is built on scalable and modular heterogeneous high-performance multi-core CPUs, energy efficient AI and computer vision (CV) engines, industry-leading GPU.
The platform with combination of SoCs and accelerator can be used as needed to address every market segment offering industry-leading thermal efficiency, from 30 Tera Operations Per Second (TOPS) for L1/L2 applications to over 700 TOPS at 130W for L4/L5 driving.
The platform can therefore result in designs that can be passively or air-cooled, thereby reducing cost, and increasing reliability, avoiding the need for expensive liquid cooled systems and allowing for simpler vehicle designs, and extending the driving range for electric vehicles. The Snapdragon Ride SoCs and accelerator are designed for functional safety ASIL-D systems.
Snapdragon Ride is expected to be available for pre-development to automakers and tier-1 suppliers in the first half of 2020. Qualcomm Technologies anticipates Snapdragon Ride-enabled vehicles to be in production in 2023.
While the company believes the next wave of innovation may be in the L2+ Convenience ADAS segment, the hardware solutions utilized in Snapdragon Ride from a single system-on-chip (SoC) for an Active Safety ADAS system driven by regulatory mandates to a highly scalable architecture of multiple SoCs and dedicated autonomous driving accelerators allowing for fully autonomous self-driving systems.
Qualcomm Technologies’ family of ADAS SoCs and accelerators are built on the fundamental approach of heterogeneous compute capabilities designed for application requirements.
These ADAS SoCs and accelerators effectively manage a large amount of data from onboard systems, leveraging Qualcomm Technologies’ next generation AI engines; image signal processors for camera sensors; enhanced digital signal processors (DSPs) for sensor signal processing; high-performance CPUs for planning and decision making; cutting-edge GPU technology for high-end visualization and immersive user experience; dedicated safety and security subsystems across the SoC and autonomous driving accelerator.
Through the autonomous driving accelerator, Qualcomm Technologies brings energy efficient compute capabilities to mainstream vehicles, which has so far been largely unavailable to the automotive industry due to exceptionally complex and expensive thermal solutions that are fundamentally unscalable because of their power consumption requirements.
Snapdragon Ride Benefits
Proven and integrated safety board support package with safe OS and hypervisors
Safety frameworks from automotive industry leaders, including Adaptive AUTOSAR
Optimized and comprehensive foundational function libraries for computer vision, sensor signal processing, and standard arithmetic libraries
AI tools for improving model efficiencies, as well as optimizing runtime on heterogeneous compute units
Comprehensive autonomous driving stack for highway functions, such as perception and planning for highway driving functions
Cost-efficient localization solution with Qualcomm Vision Enhanced Precise Positioning (VEPP)
Hardware and Software in Loop Test environment
Data Management Tools for intelligent data collection and automated annotation
Autonomous Stack
Integrated as a part of Snapdragon Ride is Qualcomm Technologies’ new purpose-built autonomous driving software stack, a modular and scalable solution available to automotive OEM and tier-1 suppliers to accelerate their development and innovations.
The software stack facilitates automakers’ abilities to offer increased safety and comfort to everyday driving by offering optimized software and applications for complex use cases, such as self-navigating human-like highway driving, as well as choice of modular options like perception, localization, sensor fusion and behavior planning.
The software infrastructure for Snapdragon Ride supports customer specific stack components to be co-hosted with the Snapdragon Ride Autonomous Stack components.
“Over the years, we have consistently demonstrated our prowess in large-scale deployment of high-performance and highly intelligent cockpit and connected car solutions that operate in power-constrained environments across virtually every class of vehicle. Today, we are pleased to be introducing our first-generation Snapdragon Ride platform, which is highly scalable, open, fully customizable and highly power optimized autonomous driving solution designed to address a range of requirements from NCAP to L2+ Highway Autopilot to Robo Taxis. Combined with our Snapdragon Ride Autonomous Stack, or an automaker or tier-1’s own algorithms, our platform aims at accelerating the deployment of high-performance autonomous driving to mass market vehicles,” said Nakul Duggal, senior vice president, product management, Qualcomm Technologies, Inc. “We’ve spent the last several years researching and developing our new autonomous platform and accompanying driving stack, identifying challenges and gathering insights from data analysis to address the complexities automakers want to solve.”
This tri-band receiver technology, when combined with baseband search and track engines, allows true simultaneous tracking of all current L1 GNSS signals, including GPS, GLONASS, BeiDou, Galileo, Quasi-Zenith Satellite System (QZSS), and satellite-based augmentation systems (SBAS).
By Charles Norman and Andreas Warloe, Broadcom Corporation
Starting with the first commercial GPS receivers, adding support for incrementally more complex GNSS systems presents significant challenges for GNSS hardware and software developers. The latest systems, especially Galileo, were designed with the assumption that Moore’s law would provide nearly unlimited computing resources and memory over time. The expected improvements in ASIC technology have indeed occurred, but market demands have pushed the size, cost, and power consumption of GNSS chipsets down, rather than allowing capabilities to grow freely.
GNSS in cellular phones is now expected to be always-on and to add only a few dollars to the cost of a $600 smartphone. Even as customers and phone manufacturers demand GLONASS, BeiDou, and Galileo support, chipset cost is not allowed to increase significantly. Instead of, in essence, designing four separate GNSS receivers in the chip, cost and size pressures force designers to look for commonality among the signals in order to share hardware blocks and software or digital signal-processing algorithms.
GNSS L1 Signal Down-Conversion
Commercial L1 GNSS signals span a 50 MHz range. It is getting harder for a single antenna to cover the entire bandwidth, but it is possible. The radio input contains three frequency bands of interest, spanning a total of 15 MHz:
BeiDou, at 1561 MHz, is at the low end;
GPS, Galileo, satellite-based augmentation systems (SBAS), and Japan’s Quasi-Zenith Satellite System (QZSS), at 1575 MHz, are in the middle; and
GLONASS, at 1602 MHz, is at the top.
The radio process in the new tri-band receiver described here first amplifies the signal using a low-noise amplifier (LNA) to keep the system noise figure as low as possible. Then it downconverts to an intermediate frequency (IF) and filters the three bands into separate channels. The three bands are then digitized and sampled at the lowest possible sample rate. The sampled bands can be filtered digitally to remove blockers and downconverted to baseband. The baseband samples are buffered by constellations to allow parallel access for searching or tracking on each visible satellite.
All satellites in a code-division multiple access (CDMA) constellation can share baseband buffers, but the frequency-division multiple access (FDMA) constellation, GLONASS, uses a separate buffer for each satellite. This is because the memory and power required to store each satellite in use is less than storing the entire FDMA bandwidth.
Signal Similarities and Differences
All GNSS satellite signals use binary phase-shift keying (BPSK) modulation. The biphase modulation is generated from a high rate pseudorandom noise (PRN) code that is exclusive-ORedwith a low-rate data stream.
The PRN code for all constellations except Galileo is generated from linear feedback shift registers (LFSRs). Galileo’s PRN code is a memory code with a bit-offset carrier BOC(1,1)/BOC(6,1) modulation. All constellations except GLONASS are CDMA. Each satellite in a CDMA constellation is at the same frequency but has a unique PRN code. GLONASS is FDMA. Each visible GLONASS satellite has a unique frequency, but all use the same PRN code.
L1 GNSS constellations use four different code lengths: 511, 1023, 2046, and 4092. The code length has a large impact on the power required to detect a signal. Data modulation is different on each constellation. BeiDou data is exclusive-ORed with a secondary code. Galileo has a secondary code-only channel. The highest data or secondary code rate is 1 kHz on BeiDou, and the lowest is 50 Hz on GPS. Table 1 shows a detailed chart with the main signal parameters for all L1 GNSS signals.
Table 1. Parameters for all L1 GNSS signals.
Radio Overview
The radio processing starts with a LNA, which utilizes a 72-nanometer negative metal oxide semiconductor transistor in a cascade configuration, with deliberate capacitive feedback and inductive source degeneration to achieve an excellent noise figure (~1.5 dB system noise figure) while maintaining a good input match. Two external matching components are required to achieve an optimal input match.
Following the LNA is an in-phase/quadrature ring mixer switched-capacitor mixer. With this style of mixer, the LNA output is only connected to one mixer output at a time and, thus, the optimal noise figure is obtained. By switching the output of the LNA from the I+ output and then later to the I– output, a 2:1 voltage gain is achieved. This improves noise figure and eases the noise requirements of the IF amplifier following the mixer, thus reducing power consumption.
The local oscillator for the mixer is derived from a low-power, low phase-noise, phase-locked loop. It has many adjustments, so the circuit can be adapted to a wide variety of reference frequencies and system requirements. It employs a ΔΣ modulator in the feedback loop, allowing for very fine frequency-control resolution.
The complex IF output from the mixer is amplified by a transimpedance section followed by three parallel amplifier/filter/attenuator sections, one for GPS/Galileo/SBAS/QZSS, one for GLONASS, and one for BeiDou. The transimpedance section’s response is close to a simple pole but with a small amount of peaking. Each of the remaining sections is built with a single complex band-pass/band-notch section, followed by real poles and zeroes. Using real poles and zeroes considerably reduces the noise and bandwidth requirements of the amplifiers. The net effect is that the power consumption of the overall IF amplifier section is substantially reduced.
There are three parallel ΔΣ analog-digital converters (ADCs), one for each of the three IF sections. The ΔΣ ADC is a continuous-time, second-order, one-bit ΔΣ ADC, running at a sample rate of 395.75 Msps. The ΔΣ ADC comprises two operational amplifiers, two digital analog converters, and a quantizer. The ΔΣ ADCs are designed in such a way that the quantization noise is lowest not at zero frequency offset (DC), but at the offset frequency of the GNSS signal. The A/D samples are filtered with a third-order cascaded integrator-comb subsampled at 99.44 mega-samples per second. Additional finite impulse response (FIR) filters and subsampling to 33.1 MHz complete the sampling. The combined ΔΣ ADC and digital filtering provide more than 50 dB of dynamic range.
Digital processing at 33.1 MHz includes several filters that remove interference sources from the received radio signal and automatic gain control logic that adjusts the gain of the IF amplifiers to give an optimal signal level. A configurable 20-tap FIR filter is provided for each sample section and can be configured to remove wideband blockers. In addition, each section has eight narrowband, single-pole infinite impulse response filters for removing narrowband blockers.
Figure 1. Radio overview diagram.
Separate Search and Track Blocks
Separate search and track sections are employed to compute correlations between the three sample streams and multiple reference hypotheses. The three sample streams are buffered in memory to allow the search and track sections to process multiple correlations in parallel. Search employs a prime factor fast Fourier transform with a selectable size (1023, 2046, or 4092).
Search correlations are computed by first removing a hypothesis Doppler from a buffered set of samples and then combining a selectable number of code epochs. The filtered samples are translated to the frequency domain, multiplied by the frequency-domain representation of the desired PRN code, and finally translated back to the time domain. This process creates a coherent correlation vector for the entire code. The coherent correlation vector is non-coherently accumulated until the signal-to-noise ratio of the peak exceeds a detection threshold.
Track correlations are computed in the time domain by multiplying a multichip reference code by a set of buffered samples. Typically, the reference code is linearly delayed for N correlations to produce an N-sample coherent correlation vector. The correlation vectors are buffered to allow multiple filters to be processed in parallel. A coprocessor is used to run the filters. The outputs from the coprocessor provide estimates of code phase, Doppler, acceleration, data synchronization, data bits, signal power, and more.
All the buffering and multiple processing sections allow for multiple hypotheses to be tested in parallel. For example, on a tunnel entry, the attenuated signal can continue to be tracked while the search section tries to detect the full-power signal.
Secondary Code Resolution. Several constellations have secondary codes that limit the length of the coherent integration unless the code can be wiped. GLONASS has a 100-Hz Manchester code, BeiDou has a 1-kHz secondary code, and the Galileo Pilot has a 250-Hz secondary code. After the time accuracy drops below 1 millisecond, all of the secondary codes can be wiped in both search and track, so the coherent period can be optimized to maximize sensitivity and minimize measurement error. On a cold start, when time is unknown, it is best to first try to detect with coherent correlations less than the secondary code chip period.
When a signal is detected, the receiver either goes into track and computes correlations with longer coherent periods for multiple time hypotheses or continues in search with a longer coherence period and multiple time hypotheses. The search and track sections allow for either of these choices. For constellations like Galileo, the best choice is to remain in search. For others like BeiDou, it is best to move to track.
Benefits of Multi-GNSS Receivers
The ability to track all L1 constellations means that even in difficult environments, there are a sufficient number of satellites to produce a navigation solution. As can be seen from field-test results, not only are more satellites tracked, but more satellites with strong signals are tracked. The measurement errors of satellites received with strong signals will be smaller, leading to very low bit-error rates and allowing for a faster ephemeris collection. Field test results confirm that a receiver with BeiDou support achieves faster and more accurate fixes than a receiver without BeiDou support (see Figure 2).
Figure 2. A receiver with BeiDou support achieves faster and more accurate fixes than a receiver without BeiDou support.
In addition to speed and accuracy improvements, more constellations provide a higher reliability. Recently, an upload error in the GLONASS constellation caused otherwise healthy satellites to report orbit errors of several kilometers. GPS/GLONASS-only systems could not completely isolate the faulty satellites. In difficult environments, there are not enough good satellites to isolate the faulty ones. With the addition of BeiDou, the faulty satellites were correctly isolated (Figure 3).
Figure 3. (Top) Seoul, South Korea, third-party GPS/GLONASS-only receiver; (bottom) Broadcom GPS/GLONASS/BeiDou receiver enables isolation of faults.
Each constellation adds unique improvements. Narrowing the correlation triangle allows for improved multipath rejection and more accurate pseudorange measurements (Figure 4).
Figure 4. Narrower correlation triangle.
GLONASS, with the slowest code rate, has the broadest correlation triangle. BeiDou, with the highest code rate, has a correlation triangle that is narrower than GPS. The BOC code on Galileo gives the narrowest correlation triangle. Field test results confirm the improved measurements (Figure 5).
GLONASS, the only FDMA constellation, has the least cross-correlation. GPS uses Gold codes to keep the cross-correlations between any of its satellites at a minimum. BeiDou and Galileo have lengthened their codes and added a secondary code to reduce cross-correlations.
Conclusion
Taking advantage of similarities in the L1 GNSS constellations together with careful design choices to minimize size and current consumption has enabled the creation of commercial GNSS system-on-chips that support all current GNSS L1 systems and meet the cost, size, and power requirements of cellular phones. The addition of new constellations like BeiDou and Galileo has significantly improved speed, performance, and reliability.
Acknowledgments
Javier de Salas, Frank van Diggelen, and John Hutson, all of Broadcom.
Manufacturer
The BCM4774 single-chip GNSS location hub for smartphones with Galileo support was designed by Broadcom Corporation.
Charles Norman is a technical director in the GNSS group at Broadcom Corporation. Previously, he worked on GNSS systems at Magnavox, Interstate, SIRF, and RFMD. He holds 39 issued patents on GNSS systems and has an M.A. in mathematics from the University of California-Los Angeles.
Andreas Warloe is a senior technical director in the GNSS group at Broadcom Corporation. He previously worked on GNSS receivers at Magellan, Leica Geosystems, IBM, and RFMD. He holds an M.S. in electrical engineering from the University of Southern California.
Mediatek has released a five-in-one combo wireless system-on-a-chip (SOC), with multi-system GNSS, to support full featured smartphones, tablets, and other premium mobile devices.
The MT6630 dramatically reduces the component count and eBOM while improving ease-of-design for manufacturers by eliminating external low noise amplifiers and integrating the Wi-Fi 2.4 GHz and 5 GHz power amplifiers, Bluetooth power amplifiers, and transmit-receive (T/R) switch into a PCBA footprint less than 65 square millimeters.
Features include:
Concurrent tri-band reception of GPS, GLONASS, Beidou, Galileo, and QZSS with industry leading sensitivity, low power, positioning accuracy, and the longest prediction engine
Dual-band single-stream 802.11a/b/g/n/ac with 20/40/80MHz channel bandwidth
802.11v time of flight protocol support and management engines to enable higher accuracy of indoor positioning via Wi-Fi
Advanced support for Wi-Fi Direct Services and Miracast optimization for easier pairing, increased robustness, advanced use-cases, and lower power
Bluetooth 4.1 with Classic, High-Speed and Low-Energy support, and ANT+ for compatibility with the latest fitness tracking, health monitoring, and point of information devices and applications
FM transceiver with RDS/RBDS
Integrated engines and algorithms for full concurrent operation and co-existence, including industry-leading throughput during LTE transmission
The MT6630 delivers full concurrent operation of all 5 systems operating at maximum compute intensity with no degradation compared to single-system operation while offloading the mobile device CPU for design ease and extended battery life.
As a focus on low power and digital home convergence, the MT6630 uses a configurable PA architecture to save current at commonly used power levels, including those used for Miracast Wi-Fi Direct services. The MT6630 implements advanced co-existence techniques, including for LTE to deliver industry-leading throughputs. The MT6630 also supports Wi-Fi diversity for premium smartphones and tablets to improve antenna angle sensitivity and handheld scenarios.
“The MT6630 makes it simple for manufacturers to bring mobile devices to market with sophisticated wireless features, lower power and uncompromised performance,” said SR Tsai, general manager of MediaTek’s Connectivity Business Unit. “The MT6630 furthers MediaTek’s focus to deliver the best experiences across the digital home and mobile applications by using its unique leadership position in digital TV host processors, smartphone platforms, and connectivity.”
The small-footprint design is available in 5 x 5-mm wafer-level chip-scale package (WLCSP) or a 7 x 7 mm quad flat no-leads (QFN) and requires only 44 components, which is around half that of other integrated wireless solutions, the company said.
Mediatek’s MT6630 is sampling now and complements the recently announced MT6595 octa-core SOC with LTE for premium mobile devices. The first commercially available devices to use the MT6630 are expected in the second half of 2014.
MediaTek Inc., a fabless semiconductor company for wireless communications and digital multimedia solutions, today announced the availability of its MT3332/MT3333, a 5-in-1 multi-GNSS receiver system-on-chip (SoC) that support the Beidou Satellite Navigation System. The Beidou system has been commercially operational since the end of 2012, and can identify a user’s location to 10 meters (33 feet), their velocity to within 0.2 meters per second, and clock synchronization signals (one-way) to within 10 nanoseconds.
The MediaTek MT3332/MT3333 can discover GPS, Beidou, GLONASS, Galileo and QZSS constellations. Featuring a multi-GNSS receiver design, the MT3332/MT3333 can reduce the cumulative distance and positioning error accumulated over time/multiple hops, and significantly improve navigation/positioning accuracy, MediaTek said. The MT3332/MT3333 also comes with excellent signal acquisition and tracking sensitivity, which efficiently enhances signal quality within dense cities, tunnels and multi-storey car-parks, while delivering a better user experience, the company said. Moreover, because of its highly integrated, low-cost and ultra-compact system architecture, the MT3332/MT3333 enables multi-GNSS receivers with the same reference board for mobile, industrial and automotive navigation applications.
“The proliferation of LBS (location-based services) using mobile applications over wireless networks such as social check-in or nearby service recommending is driving demand for greater satellite navigation performance and coverage beyond existing technologies. This will also lead to the rapid adoption of multi-GNSS receiver solutions in smartphones, tablets and automotive vehicles because LBS is now an indispensable way for people to interact/communicate with each other on a daily basis,” said SR Tsai, general manager of the Wireless Connectivity and Networking Business Unit at MediaTek. “We believe the market for Beidou-compatible multi-GNSS receivers in China will accelerate in the coming years. MediaTek will deliver new products that offer high value and are capable of meeting the evolving needs of our customers in the Beidou navigation system market through continuous product innovation. The MT3332/MT3333 [models] are designed to accelerate the realization of satellite navigation services anytime, anywhere, in a seamless fashion.”
The MT3332/MT3333 also incorporates MediaTek’s unique “AlwaysLocate” technology that can identify the state in which the user is (regardless of on-the-go or sleeping) and automatically adjust the satellite signal receiving modes for more accurate and reliable navigation services, and to save the battery power of the navigation system.
The MediaTek MT3332/MT3333 is now in mass production stage and being designed into major satellite navigation systems and mobile communication platforms worldwide.
OneNav has announced the commercial availability of its pureL5 GNSS digital IP core.
